0007-ARM-dts-N9-N950-Add-touchscreen-support.patch (1942B)
1 From 15b1d44e2e17ace2ac229a062993e5b530208402 Mon Sep 17 00:00:00 2001 2 From: =?UTF-8?q?Filip=20Matijevi=C4=87?= <filip.matijevic.pz@gmail.com> 3 Date: Mon, 13 Nov 2017 17:20:42 +0100 4 Subject: [PATCH 07/11] ARM: dts: N9/N950: Add touchscreen support 5 MIME-Version: 1.0 6 Content-Type: text/plain; charset=UTF-8 7 Content-Transfer-Encoding: 8bit 8 9 Signed-off-by: Filip Matijević <filip.matijevic.pz@gmail.com> 10 --- 11 arch/arm/boot/dts/omap3-n950-n9.dtsi | 22 ++++++++++++++++++++++ 12 1 file changed, 22 insertions(+) 13 14 diff --git a/arch/arm/boot/dts/omap3-n950-n9.dtsi b/arch/arm/boot/dts/omap3-n950-n9.dtsi 15 index 0d9b85317529..219519812050 100644 16 --- a/arch/arm/boot/dts/omap3-n950-n9.dtsi 17 +++ b/arch/arm/boot/dts/omap3-n950-n9.dtsi 18 @@ -141,6 +141,14 @@ 19 OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0) /* uart2_rx */ 20 >; 21 }; 22 + 23 + ts_pins: pinmux_ts_pins { 24 + pinctrl-single,pins = < 25 + /* REVISIT pinmuxing gpmc_nbe1 to gpio_61 breaks Atmel maXTouch */ 26 + /*OMAP3_CORE1_IOPAD(0x20c8, PIN_INPUT | MUX_MODE4)*/ /* gpmc_nbe1.gpio_61 -> TINTX */ 27 + OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE4) /* dss_data11.gpio_81 -> TRESX */ 28 + >; 29 + }; 30 }; 31 32 &omap3_pmx_core2 { 33 @@ -199,6 +207,7 @@ 34 regulator-name = "vaux1"; 35 regulator-min-microvolt = <2800000>; 36 regulator-max-microvolt = <2800000>; 37 + regulator-always-on; /* needed for Atmel maXTouch */ 38 }; 39 40 /* CSI-2 receiver */ 41 @@ -261,6 +270,7 @@ 42 regulator-name = "vio"; 43 regulator-min-microvolt = <1800000>; 44 regulator-max-microvolt = <1800000>; 45 + regulator-always-on; /* needed for Atmel maXTouch */ 46 }; 47 48 &i2c2 { 49 @@ -283,6 +293,18 @@ 50 led-max-microamp = <10000>; 51 }; 52 }; 53 + 54 + touch@4b { 55 + compatible = "atmel,maxtouch"; 56 + reg = <0x4b>; 57 + 58 + pinctrl-names = "default"; 59 + pinctrl-0 = <&ts_pins>; 60 + 61 + interrupt-parent = <&gpio2>; 62 + interrupts = <29 IRQ_TYPE_EDGE_FALLING>; /* gpio_61 */ 63 + reset-gpios = <&gpio3 17 0>; /* gpio_81 */ 64 + }; 65 }; 66 67 &i2c3 { 68 -- 69 2.14.1 70